MIPI I3C Basic v1.0 - implementation of I3C Slave in Verilog with BSD license to support use in sensors and other devices.

Features:
◦ I3C SDR protocol
◦ All required CCCs plus some optional ones
◦ IBI (in band interrupt) including optional IBI data byte
◦ Support for I2C with a static address
◦ Two different integrations depending on system:
◦ Full APB memory mapped registers for processor based systems
◦ Autonomous model for state machine ASICs

Note: this version does not include HDR-DDR, HDR-Ternary, Time-control, nor Master support. It also lacks some other advanced features including for i2c.

https://github.com/NXP/i3c-slave-design

#I3C #I2C #verilog #MIPI