Wupper - PCIe Gen3/Gen4/Gen5 DMA controller for Xilinx FPGA

Features
▫️Specifically designed for the 256/512/1024 bit wide AXI4-Stream interface
▫️Generic MSI-X compatible interrupt controller.
▫️Supporting PCIe Gen3, Gen4 and Gen5
▫️Supporting Series 7, UltraScale, Ultrascale+, Versal Prime and Versal Premium FPGAs

Links
💾 https://gitlab.nikhef.nl/franss/wupper/
📄 https://gitlab.nikhef.nl/franss/wupper/-/blob/master/documentation/wupper.pdf

#PCIE #DMA #Xilinx #FPGA #VHDL
@ipcores