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𝗜𝗣 cores 𝗜𝗣 cores @ipcores · 1.2K subscribers
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Ibex - a small and efficient, 32-bit, in-order RISC-V core with a 2-stage pipeline that implements the RV32IMC instruction set architecture.

Ibex is ideally suited as control core in many embedded scenarios. Ibex is a high-quality core: together with the RTL, lowRISC provides full UVM-based verification, extensive documentation and all the tools to successfully integrate Ibex into designs.

Ibex offers several configuration parameters to meet the needs of various application scenarios. The options include two different choices for the architecture of the multiplier and divider unit, as well as the possibility to drop the support for the "M" extension completely. In addition, the "E" extension can be enabled when opting for a minimum-area configuration.

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#ISA #RISCV #SystemVerilog #SV #CPU #LowRISC
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