DVB_FPGA - RTL implementation of components for DVB-S2 (initially focusing on the transmission side).

Features:
◦ AXI-Stream interfaces
◦ Frame types: Normal and short
◦ Constellations: 8 PSK, 16 APSK and 32 APSK
◦ Code rates: 1/4, 1/3, 2/5, 1/2, 3/5, 2/3, 3/4, 4/5, 5/6, 8/9, 9/10

Components done:
◦ Baseband scrambler
◦ BCH encoder
◦ Bit interleaver
Components todo:
◦ Constellation mapper
◦ LDPC Encoder
◦ Physical layer framing

https://github.com/phase4ground/dvb_fpga

#VHDL #DVB #AXI #LDPC