VHDL-extras - provides some extra bits of code that are not found in the standard VHDL libraries. The VHDL-extras library contains 50+ components and many more utility functions that can enhance and simplify many hardware development tasks.

● Core packages
◦ pipelining – Pipeline registers
◦ sizing – Generalized integer logarithms and array size computation
◦ synchronizing – Clock domain synchronizing components
◦ timing_ops – Conversions for time, frequency, and clock cycles
● Arithmetic
◦ arithmetic – Pipelined adder
◦ bit_ops – Bitwise operations
◦ cordic – CORDIC rotation algorithm and Sine/Cosine generation
◦ filtering – Digital filters
● Signal processing
◦ ddfs – Direct Digital Frequency Synthesizer
◦ oscillator – Sinusoidal frequency generators
● Error handling
◦ crc_ops – Compute CRCs
◦ hamming_edac – Generalized Hamming error correction encoding and decoding
◦ parity_ops – Basic parity operations
◦ secded_edac – Hamming extension with double-error detection
● Encoding
◦ bcd_conversion – Encode and decode packed Binary Coded Decimal
◦ gray_code – Encode and decode Gray code
◦ muxing – Decoder and muxing operations
● Memories
◦ fifos – General purpose FIFOs
◦ memory – Synthesizable memories
◦ reg_file – General purpose register file
● Randomization
◦ lcar_ops – Linear Cellular Automata
◦ lfsr_ops – Linear Feedback Shift Registers
◦ random – Simulation-only random number generation
● Miscellaneous
◦ binaryio – Binary file I/O
◦ interrupt_ctl – General purpose priority interrupt controller
◦ text_buffering – Store text files in internal buffers
◦ glitch_filtering – Clean up noisy inputs


Docs and sources

#VHDL #library #primitives