VectorBlox ORCA is an implementation of RISC-V. It is intended to target FPGAs and can be configured as either #RV32I a #RV32IM core.

ORCA can be used as a standalone processor, but was built to be a host to Vectorblox's proprietary Lightweight Vector Extensions (LVE) or full-fledged Matrix processor MXP.

It has optional #AXI3/4 instruction and data caches, a separate #AXI4-Lite interface for uncached transactions, and an auxiliary interface that can be configured as either #WISHBONE, Intel #Avalon, or Xilinx #LMB.

https://github.com/VectorBlox/orca

#VHDL #RISCV @ipcores