PCIe DMA Engine for Xilinx FPGA

Its main purpose is to provide a simple Direct Memory Access (DMA) interface to the Xilinx Virtex-7 PCIe Gen3 hard block. Core is specifically designed for the 256 bit wide AXI4-Stream interface of the Xilinx FPGA HardBlock PCIe Gen3. Core has been also successfully ported to Xilinx Kintex UltraScale FPGA.

https://opencores.org/projects/virtex7_pcie_dma

#PCIe #DMA #Xilinx #VHDL #AXIS
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