Send video/audio over HDMI on an FPGA

SystemVerilog code for HDMI 1.4b video/audio output on an FPGA.

Features
▫️ 24-bit color
▫️ Data island packets
▫️ Null packet
▫️ ECC with BCH systematic encoding GF(2^8)
▫️ Audio clock regeneration
▫️ L-PCM audio 2-channel
▫️ Audio InfoFrame
▫️ Video formats 1, 2, 3, 4, 16, 17, 18, 19
▫️ VGA text mode
▫️ IBM 8x16 font
▫️ Double Data Rate I/O (DDRIO)
▫️ Supports up to 3840x2160@30Hz

Links
💾 https://github.com/hdl-util/hdmi
📄 https://purisa.me/blog/hdmi-released/

#HDMI #video #SV #SystemVerilog
@ipcores